Source Code for Module vtrace.watchpoints

 1  """ 
 2  Watchpoint Objects 
 3  """ 
 4  # Copyright (C) 2007 Invisigoth - See LICENSE file for details 
 5  from vtrace import * 
 6  from vtrace.breakpoints import * 
 7   
 8 -class Watchpoint(Breakpoint): 
 9      """ 
10      The basic "break on access" watchpoint.  Extended from  
11      Breakpoints and handled almost exactly the same way... 
12      """ 
13 -    def __init__(self, addr, expression=None, size=4, perms="rw"): 
14          Breakpoint.__init__(self, addr, expression=expression) 
15          self.wpsize = size 
16          self.wpperms = perms 
17   
18 -    def inittrace(self, trace): 
19          # No need to get a breakinstr 
20          pass 
21   
22 -    def resolvedaddr(self, trace, addr): 
23          # We needn't save the memory at our addr... 
24          pass 
25   
26 -    def getName(self): 
27          bname = Breakpoint.getName(self) 
28          return "%s (%s %d bytes)" % (bname, self.wpperms, self.wpsize) 
29   
30 -    def activate(self, trace): 
31          trace.requireAttached() 
32          if not self.active: 
33              if self.address != None: 
34                  trace.archAddWatchpoint(self.address, size=self.wpsize, perms=self.wpperms) 
35                  self.active = True 
36          return self.active 
37   
38 -    def deactivate(self, trace): 
39          trace.requireAttached() 
40          if self.active: 
41              trace.archRemWatchpoint(self.address) 
42              self.active = False 
43          return self.active 
44   
45 -class PageWatchpoint(Watchpoint): 
46      """ 
47      A special "watchpoint" that uses memory permissions to 
48      watch for accesses to whole memory maps.  This *requires* OS 
49      help and only works on platforms which support: 
50      * platformProtectMemory() 
51      * signal/exceptions which denote the fault address on SEGV 
52   
53      NOTE: These *must* be added page aligned 
54      """ 
55 -    def __init__(self, addr, expression=None, size=4, watchread=False): 
56          Watchpoint.__init__(self, addr, expression=expression, size=size, perms='rw') 
57          self._orig_perms = None 
58          self._new_perms = e_mem.MM_READ 
59          if watchread: 
60              self._new_perms = e_mem.MM_NONE 
61   
62 -    def resolvedaddr(self, trace, addr): 
63          self._orig_perms = trace.getMemoryMap(addr)[2] 
64   
65 -    def notify(self, event, trace): 
66          pw = trace.getMeta('pagewatch') 
67          pc = trace.getProgramCounter() 
68          vaddr,vperm = trace.platformGetMemFault() 
69          pw.append((pc, vaddr, vperm)) 
70          # Change to/from fastbreak on pagerun... 
71          self.fastbreak = trace.getMeta('pagerun') 
72   
73 -    def getName(self): 
74          bname = Breakpoint.getName(self) 
75          return "%s (%s %d bytes)" % (bname, e_mem.reprPerms(self._new_perms), self.wpsize) 
76   
77 -    def activate(self, trace): 
78          #trace.requireNotRunning() 
79          if not self.active: 
80              trace.protectMemory(self.address, self.wpsize, self._new_perms) 
81              self.active = True 
82          return self.active 
83   
84 -    def deactivate(self, trace): 
85          #trace.requireNotRunning() 
86          if self.active: 
87              trace.protectMemory(self.address, self.wpsize, self._orig_perms) 
88              self.active = False 
89          return self.active 
90